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 IPB04CNE8N G IPP04CNE8N G
OptiMOSTM2 Power-Transistor
Features * N-channel, normal level * Excellent gate charge x R DS(on) product (FOM) * Very low on-resistance R DS(on) * 175 C operating temperature * Pb-free lead plating; RoHS compliant * Qualified according to JEDEC1) for target application
Product Summary V DS R DS(on),max (TO 263) ID 85 3.9 100 V m A
* Ideal for high-frequency switching and synchronous rectification *Halogen-free according to IEC61249-2-21
Type
IPB04CNE8N G
IPP04CNE8N G
Package Marking
PG-TO263-3 04CNE8N
PG-TO220-3 04CNE8N
Maximum ratings, at T j=25 C, unless otherwise specified Parameter Continuous drain current Symbol Conditions ID T C=25 C2) T C=100 C Pulsed drain current3) Avalanche energy, single pulse Gate source voltage 4) Power dissipation Operating and storage temperature IEC climatic category; DIN IEC 68-1 I D,pulse E AS V GS P tot T j, T stg T C=25 C T C=25 C I D=100 A, R GS=25 Value 100 100 400 1000 20 300 -55 ... 175 55/175/56 mJ V W C Unit A
Rev. 1.03
page 1
2010-01-13
IPB04CNE8N G IPP04CNE8N G
Parameter Symbol Conditions min. Thermal characteristics Thermal resistance, junction - case Thermal resistance, junction - ambient R thJC R thJA minimal footprint 6 cm2 cooling area5) 0.5 62 40 K/W Values typ. max. Unit
Electrical characteristics, at T j=25 C, unless otherwise specified Static characteristics Drain-source breakdown voltage Gate threshold voltage Zero gate voltage drain current V (BR)DSS V GS=0 V, I D=1 mA V GS(th) I DSS V DS=V GS, I D=250 A V DS=68 V, V GS=0 V, T j=25 C V DS=68 V, V GS=0 V, T j=125 C Gate-source leakage current Drain-source on-state resistance I GSS R DS(on) V GS=20 V, V DS=0 V V GS=10 V, I D=100 A V GS=10 V, I D=100 A, TO263 Gate resistance Transconductance RG g fs |V DS|>2|I D|R DS(on)max, I D=100 A 85 2 3 0.1 4 1 A V
83
10 1 3.5 3.2 1.3 165
100 100 4.2 3.9 S nA m
1)
J-STD20 and JESD22 Current is limited by bondwire; with an R thJC=0.5 K/W the chip is able to carry 182 A. See figure 3 Tjmax=150 C and duty cycle D=0.01 for Vgs<-5V
2)
3)
4) 5)
2 Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm (one layer, 70 m thick) copper area for drain connection. PCB is vertical in still air.
Rev. 1.03
page 2
2010-01-13
IPB04CNE8N G IPP04CNE8N G
Parameter Symbol Conditions min. Dynamic characteristics Input capacitance Output capacitance Reverse transfer capacitance Turn-on delay time Rise time Turn-off delay time Fall time Gate Charge Characteristics 6) Gate to source charge Gate to drain charge Switching charge Gate charge total Gate plateau voltage Output charge Reverse Diode Diode continous forward current Diode pulse current Diode forward voltage Reverse recovery time Reverse recovery charge
6)
Values typ. max.
Unit
C iss C oss C rss t d(on) tr t d(off) tf V DD=40 V, V GS=10 V, I D=50 A, R G=1.6 V GS=0 V, V DS=40 V, f =1 MHz
-
10500 1970 130 34 78 76 25
14000 pF 2620 195 51 117 114 38 ns
Q gs Q gd Q sw Qg V plateau Q oss V DD=40 V, V GS=0 V V DD=40 V, I D=100 A, V GS=0 to 10 V
-
53 35 56 156 5.0 150
70 53 81 208 200
nC
V nC
IS I S,pulse V SD t rr Q rr
T C=25 C V GS=0 V, I F=100 A, T j=25 C V R=40 V, I F=I S, di F/dt =100 A/s
-
1.0 100 295
100 400 1.2 -
A
V ns nC
See figure 16 for gate charge parameter definition
Rev. 1.03
page 3
2010-01-13
IPB04CNE8N G IPP04CNE8N G
1 Power dissipation P tot=f(T C) 2 Drain current I D=f(T C); V GS10 V
350
120
300
100
250 80
P tot [W]
200
I D [A]
150 100 50 0 0 50 100 150 200
60
40
20
0 0 50 100 150 200
T C [C]
T C [C]
3 Safe operating area I D=f(V DS); T C=25 C; D =0 parameter: t p
103
limited by on-state resistance 1 s 10 s 100 s
4 Max. transient thermal impedance Z thJC=f(t p) parameter: D =t p/T
100
0.5
0.2
10
2
10-1
Z thJC [K/W]
1 ms
0.1 0.05 0.02 0.01
I D [A]
10 ms
10
1
DC
10
-2
single pulse
100 10
-1
10-3 10
0
10
1
10
2
10
3
10-5
10-4
10-3
10-2
10-1
100
V DS [V]
t p [s]
Rev. 1.03
page 4
2010-01-13
IPB04CNE8N G IPP04CNE8N G
5 Typ. output characteristics I D=f(V DS); T j=25 C parameter: V GS
400
10 V 7V 8V
6 Typ. drain-source on resistance R DS(on)=f(I D); T j=25 C parameter: V GS
15
320
6.5 V 6V
12
5V 4.5 V
240
R DS(on) [m]
9
I D [A]
160
5.5 V
6
5.5 V 6V 10 V
80
5V
3
4.5 V
0 0 1 2 3 4 5
0 0 50 100 150
V DS [V]
I D [A]
7 Typ. transfer characteristics I D=f(V GS); |V DS|>2|I D|R DS(on)max parameter: T j
300
8 Typ. forward transconductance g fs=f(I D); T j=25 C
200
250 160
200 120 150
g fs [S]
80
175 C 25 C
I D [A]
100
50
40
0 0 2 4 6 8
0 0 50 100 150
V GS [V]
I D [A]
Rev. 1.03
page 5
2010-01-13
IPB04CNE8N G IPP04CNE8N G
9 Drain-source on-state resistance R DS(on)=f(T j); I D=100 A; V GS=10 V 10 Typ. gate threshold voltage V GS(th)=f(T j); V GS=V DS parameter: I D
10 4
3.5 8 3
250 A 2500 A
R DS(on) [m]
6
98 %
2.5
V GS(th) [V]
100 140 180
2
4
typ
1.5
1 2 0.5
0 -60 -20 20 60
0 -60 -20 20 60 100 140 180
T j [C]
T j [C]
11 Typ. capacitances C =f(V DS); V GS=0 V; f =1 MHz
12 Forward characteristics of reverse diode I F=f(V SD) parameter: T j
105
103
104
Ciss Coss
25 C
175 C, 98%
102
175 C
C [pF]
103
Crss
I F [A]
25 C, 98%
101 102
101 0 20 40 60 80
100 0 0.5 1 1.5 2
V DS [V]
V SD [V]
Rev. 1.03
page 6
2010-01-13
IPB04CNE8N G IPP04CNE8N G
13 Avalanche characteristics I AS=f(t AV); R GS=25 parameter: T j(start)
1000
14 Typ. gate charge V GS=f(Q gate); I D=100 A pulsed parameter: V DD
10
60 V
8
40 V
100
25 C
20 V
6
100 C
150 C
V GS [V]
4 2 0 1000 0
I AS [A]
10 1 1 10
100
50
100
150
200
t AV [s]
Q gate [nC]
15 Drain-source breakdown voltage V BR(DSS)=f(T j); I D=1 mA
16 Gate charge waveforms
100
V GS
Qg
95
V BR(DSS) [V]
90
85
V g s(th)
80
Q g(th) Q gs
-60 -20 20 60 100 140 180
Q sw Q gd
Q g ate
75
T j [C]
Rev. 1.03
page 7
2010-01-13
IPB04CNE8N G IPP04CNE8N G
PG-TO220-3: Outline
Rev. 1.03
page 8
2010-01-13
IPB04CNE8N G IPP04CNE8N G
PG-TO-263 (D-Pak)
Rev. 1.03
page 9
2010-01-13
IPB04CNE8N G IPP04CNE8N G
Published by Infineon Technologies AG 81726 Munich, Germany (c) 2007 Infineon Technologies AG All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights of any third party. Information For further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon Technologies Office ( www.infineon.com). Warnings Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office. Infineon Technologies components may be used in life-support devices or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered.
Rev. 1.03
page 10
2010-01-13


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